Topological Qubits
A topological qubit stores quantum information in a nonlocal sector of a many-body system or quantum code. Representative logical variables are the fusion channel of separated anyons, the joint fermion parity of several Majorana zero modes, or a global string degree of freedom in an actively stabilized topological code. Ideally, no sufficiently local operator can distinguish or rotate the logical states.
That definition describes an encoding principle, not a finished device. A working topological-qubit module still needs a gapped or repeatedly stabilized code space, initialization, controllable logical operations, basis-sensitive readout, cooling or reset, leakage handling, classical control, and a path to a universal gate set. Some of those operations are topologically protected; others are ordinary fault paths.
Four statements must therefore remain separate:
- a topological phase or encoded topological state exists;
- the intended nonlocal logical sector has been identified;
- one or more parity, fusion, braid, or logical-string operations work;
- total logical error decreases when separation, system size, or code distance increases.
Evidence for one statement does not establish the next. A zero-energy feature is not a qubit, a long parity lifetime is not a coherence time, and a measurement-based braid is not a scalable fault-tolerant processor.
Purpose and Canonical Scope
Section titled “Purpose and Canonical Scope”This page owns the hardware and architecture layer for topological qubits:
- the physical contents of Majorana, fractional-Hall, and synthesized topological modules;
- parity-constrained encodings in tetrons, hexons, and anyon fusion spaces;
- initialization, measurement-only control, physical braiding, and readout;
- poisoning, thermal anyons, mode overlap, diabatic leakage, and measurement faults;
- connectivity, universal-gate completion, active correction, and full resource accounting;
- evidence labels through 10 August 2026.
Anyons and Braiding owns braid groups, fusion rules, - and -moves, and the mathematical distinction between Abelian, Ising, and Fibonacci anyons. Topological Superconductors owns Bogoliubov–de Gennes topology, the Kitaev-chain mechanism, Majorana boundary modes, candidate material platforms, and spectroscopic ambiguity. Topological Quantum Computation owns the device-independent map from a declared fusion-space encoding and braid/fusion/measurement program to its projective logical channel, native alphabet and non-braid completion, decoder, leakage certificate, and resource record. Topological Quantum Computation Bridge owns the protection hierarchy, cross-platform comparison, programmed-versus-intrinsic classification, and dated evidence ledger.
The narrower task here is engineering: what has to be built around the nonlocal degree of freedom, what can fail, what must be measured, and which experimental claims currently support each layer of the architecture. Surface Code remains the canonical home for actively stabilized surface-code patches, decoding, thresholds, and lattice surgery.
What Protection Does and Does Not Mean
Section titled “What Protection Does and Does Not Mean”Let be a logical subspace with projector . A useful idealization of local indistinguishability is
where is supported in a region of diameter , is the separation or code scale, and is a correlation or localization length. To leading order, a local probe sees the same expectation value in every logical state. The same locality structure can suppress a residual splitting,
up to oscillatory and device-dependent factors.
This is passive suppression of selected local matrix elements. It does not protect against every mechanism:
- a quasiparticle can enter a superconducting island and change fermion parity;
- thermally created anyons can diffuse around a nontrivial cycle;
- an operation can cross the gap too quickly and leak;
- an operation can run too slowly and accumulate a dynamical phase;
- a detector can misclassify parity or disturb it;
- a local defect can close the gap or nucleate an unwanted low-energy state;
- a nonlocal environmental process can act directly as a logical operator;
- an unprotected non-Clifford resource can dominate the logical error budget.
Topological protection is therefore error bias and suppression under stated assumptions, not absolute immunity. Long computations still require active error detection, repeated measurements, decoding, and fault-tolerant composition.
Topological matter and topological codes
Section titled “Topological matter and topological codes”The word topological is used for two related but operationally different resources.
| Resource | Where the nonlocal sector comes from | How it is maintained |
|---|---|---|
| intrinsic or engineered topological matter | a gapped many-body or Bogoliubov phase and its defects | Hamiltonian gap, cooling, separation, parity control |
| synthesized topological state | a conventional processor prepares a code or string-net wavefunction | calibrated gates, measurements, verification |
| actively stabilized topological code | repeated local checks define a logical sector | syndrome cycles, decoder, feedback or Pauli frame |
A surface-code qubit is genuinely topological at the code level, even though its transmons, ions, or atoms are not topological quasiparticles. Conversely, a candidate topological superconductor can possess a useful bulk invariant without yet providing a controllable qubit. Naming the layer prevents a material claim from being silently promoted into a processor claim.
The Architecture Contract
Section titled “The Architecture Contract”Represent a topological-qubit module schematically as
Here specifies the physical phase or stabilized code space, the constrained logical sector, the available parity or fusion measurements, the gate primitives, preparation and reset, and the decoder and Pauli frame. A credible platform description must additionally identify:
- the gap, stabilizer scale, or other mechanism separating the code space;
- the logical basis and all global charge or parity constraints;
- the leakage sectors and how they are detected;
- which operations are protected and which are merely calibrated;
- the non-Clifford resource and its error-correction path;
- detector bandwidth, assignment error, backaction, and reset;
- poisoning, thermalization, and unintended-anyon rates;
- the connectivity graph for joint measurements or worldlines;
- scaling data with separation, length, temperature, or code distance;
- every island, wire, quantum dot, resonator, control line, refrigerator channel, decoder, and discarded run inside the resource boundary.
A Majorana tetron is not four isolated symbols. Four end modes share a fixed-parity superconducting island, while tunable quantum-dot loops and an RF chain expose selected bilinears such as and . A scalable module also needs joint-parity links, reset, a controller and Pauli frame, active error correction, and a non-Clifford resource. Every element can limit the logical channel.
Majorana Encodings
Section titled “Majorana Encodings”Algebra and parity constraint
Section titled “Algebra and parity constraint”Majorana operators satisfy
Two Majoranas define one ordinary fermionic mode,
Although Majoranas span occupation states before constraints, a fixed total fermion parity removes half of them. The usable Hilbert-space dimension is therefore
Four Majoranas are the minimum for one parity-conserving qubit. A convenient choice of logical Pauli operators is
within a sector of fixed
The bilinears square to the identity and anticommute in the expected pairs. A single pair of Majoranas has two formal occupations, but changing between them changes total parity. Without a larger parity ledger or reservoir, that pair is not a freely controllable qubit.
Tetrons, hexons, and islands
Section titled “Tetrons, hexons, and islands”A tetron places four Majorana modes on a superconducting island, commonly using two proximitized wire segments joined by a superconducting backbone. Charging energy
penalizes charge fluctuations and helps fix total parity. It does not prove that the end modes are topological, nor does it eliminate poisoning from nonequilibrium quasiparticles.
A hexon uses six Majoranas. At fixed total parity it has a four-dimensional sector, which can be organized as one data qubit plus a parity ancilla or as a denser two-qubit encoding. The extra pair can simplify measurement-only Clifford operations, but it increases device area, tuning requirements, and readout connectivity.
Sparse and dense encodings trade hardware against control complexity. Dense encodings use the parity-constrained Hilbert space efficiently but make single-qubit addressing and leakage bookkeeping more involved. Sparse encodings reserve ancillary degrees of freedom and can simplify fault containment. A platform comparison must state which encoding and which fixed parity constraints it assumes.
What the material must supply
Section titled “What the material must supply”In an ideal one-dimensional topological superconductor, a Majorana mode is localized near each end and the overlap splitting behaves schematically as
Longer wires help only when the induced gap stays open, disorder does not introduce additional subgap states, and the coherence length remains short relative to . Smooth confinement and partially separated Andreev states can imitate several local Majorana signatures. The device therefore needs convergent evidence from the bulk gap, nonlocal response, parity structure, perturbation tests, and ultimately fusion- or braid-sensitive operations.
Quantum-dot chains tuned near a Kitaev sweet spot offer a second route. Their couplings are highly controllable, and two- or three-site chains can exhibit Majorana-like end modes. These short modes are often called poor man’s Majoranas. They are useful qubit prototypes, but a few-site chain has no large- regime in which exponential protection has been demonstrated.
Other Anyon Encodings
Section titled “Other Anyon Encodings”Fractional quantum Hall anyons
Section titled “Fractional quantum Hall anyons”Fractional quantum Hall fluids provide intrinsic two-dimensional topological order. For four Ising anyons with fixed total vacuum charge, the two allowed intermediate fusion channels,
can encode a qubit. Braiding acts on the fusion space, and fusion or interferometric measurement reads a chosen basis. The physical module needs more than a high-quality Hall plateau:
- localized creation and positioning of individual quasiparticles;
- stable gates and interferometer area;
- control of edge reconstruction and neutral modes;
- discrimination between electromagnetic and statistical phase;
- basis-sensitive fusion readout;
- repeatable noncommuting braid words;
- a layout for many anyons without uncontrolled enclosed charge.
Laughlin quasiparticles with Abelian statistics are experimentally established, but their braid contributes only a scalar phase. That achievement does not by itself provide a non-Abelian fusion-space qubit. Even-denominator states are leading non-Abelian candidates, yet identifying their exact topological order and controlling individual anyons remain active experimental problems.
Fibonacci anyons would be braid-universal in principle. Candidate Read–Rezayi phases and engineered interfaces motivate the route, while no intrinsic material platform has yet supplied a scalable, individually controlled Fibonacci register.
Synthesized anyons and active topological qubits
Section titled “Synthesized anyons and active topological qubits”Superconducting, trapped-ion, neutral-atom, and other processors can prepare toric-code, quantum-double, or string-net states; create encoded excitations; apply logical strings; and measure fusion or braid outcomes. These are genuine many-body quantum simulations and, when repeated checks are used, genuine topological quantum codes.
The protection mechanism is nevertheless the one implemented by the underlying hardware and circuit. A finite-depth programmed braid does not automatically inherit the passive gap protection of an intrinsic anyon worldline. The relevant questions are whether the encoded state is stabilized during the operation, whether faults remain local in the code, and whether logical error falls with code distance.
Initialization and Reset
Section titled “Initialization and Reset”Topological encodings are constrained sectors, so initialization means more than cooling a local two-level system.
For a Majorana island, a representative sequence is:
- tune the device into the intended gapped regime;
- isolate or Coulomb-blockade the island so total parity is defined;
- measure one or more Majorana bilinears;
- condition subsequent operations on the outcome or update a Pauli frame;
- verify that above-gap and unintended subgap occupations are absent;
- repeat until preparation error and leakage satisfy the logical budget.
Cooling alone need not select a logical basis state when the code space is degenerate. Temporarily coupling Majoranas can lift that degeneracy and select a fusion channel, but the coupling is then an unprotected local Hamiltonian. Its turn-on, turn-off, and residual phase must be included in the preparation error.
For material anyons, initialization can create quasiparticle pairs from the vacuum, move them to separated traps, and verify total topological charge. For an active code, initialization prepares physical carriers and measures stabilizers until a consistent syndrome history is obtained. In each case, the record and its acceptance rule are part of the prepared state.
Reset has a similarly broad boundary. It may require evacuating quasiparticles, rethermalizing an island, emptying quantum dots, reinitializing detectors, or rerunning stabilizer rounds. A fast parity measurement paired with a slow or unreliable reset does not produce a fast logical cycle.
Gates and Control
Section titled “Gates and Control”Physical braiding
Section titled “Physical braiding”For a chosen orientation, exchanging two Majoranas can be represented by
Its action on the operators is
The sign reverses with braid orientation. The important feature is that different exchanges need not commute on a degenerate fusion space.
A physical braid requires controllable worldlines in a two-dimensional network, vortices, or branched wire geometry. The operation must be slow relative to the inverse excitation gap but fast relative to residual splitting, poisoning, and dephasing. Writing for its duration, a useful operating window is
No window exists if a small gap demands slow motion while overlap or poisoning demands fast motion.
Measurement-only braiding
Section titled “Measurement-only braiding”Majorana modes need not be physically moved. Sequences of projective joint parity measurements, together with an ancillary pair and feed-forward, can implement the same logical Clifford transformation. Tunable quantum dots can couple selected Majorana pairs around an interferometric loop; the parity-dependent energy or quantum capacitance is then read through a charge sensor or microwave resonator.
This replaces geometric motion with a measurement graph. It also moves much of the engineering burden into:
- switchable tunnel couplings with low residual interaction;
- compatible loops for noncommuting Pauli measurements;
- single-shot detector speed and assignment fidelity;
- quantum-nondemolition repeatability;
- ancilla initialization and reset;
- low-latency outcome processing and Pauli-frame tracking;
- suppression of correlated errors when one dot or resonator touches several qubits.
Calling the resulting gate measurement-only does not mean controller-free. The measurement schedule and conditional corrections are the gate.
Universal computation
Section titled “Universal computation”Braiding Ising anyons or Majorana modes generates Clifford operations, not a universal gate set. A universal architecture therefore needs an additional non-Clifford resource, such as:
- a calibrated dynamical phase from controlled Majorana hybridization;
- preparation and injection of noisy magic states followed by distillation;
- a nontopological ancillary qubit coupled to the topological sector;
- a different anyon theory, such as an ideal Fibonacci platform.
The extra resource may be much noisier than the protected Clifford layer. Resource estimates must include its factories, verification, routing, distillation, and failure probability. “Topological gates” is incomplete unless it says which gates and how universality is completed.
Measurement and Readout
Section titled “Measurement and Readout”Majorana parity readout
Section titled “Majorana parity readout”A detector should couple to a chosen Majorana product without learning an unwanted local occupation. For a two-Majorana parity , an ideal binary measurement has effects
Real devices have finite contrast, relaxation during integration, leakage, drift, and backaction. At minimum, report:
- integration time and total cycle time;
- assignment errors conditioned on each parity;
- repeatability under immediate repeated measurements;
- parity-switching rate with the detector on and off;
- false correlations caused by charge-state or resonator drift;
- the operating region and tuning procedure;
- whether the signal distinguishes topology from a trivial low-energy state.
Interferometric quantum-capacitance readout can be an excellent parity sensor while remaining agnostic about whether the underlying end modes are topological Majoranas or finely tuned Andreev states. The sensor claim and the phase-identification claim must be evaluated separately.
Anyon fusion and interferometry
Section titled “Anyon fusion and interferometry”In a Hall interferometer, the measured phase can contain an Aharonov–Bohm contribution, Coulomb effects, edge dynamics, and an anyonic statistical phase. Changing magnetic field, area, bulk quasiparticle number, temperature, bias, and path orientation supplies essential controls. A fusion-space qubit needs more than a periodic oscillation: the measurement must resolve fusion-channel-dependent outcomes and distinguish noncommuting operation orders.
QND is a channel property
Section titled “QND is a channel property”For a desired parity , repeatability is not sufficient by itself. A detector can repeatedly report the same wrong state or freeze dynamics by strong backaction. A quantum-nondemolition claim should test both information gain and disturbance, ideally through conditional transition matrices and interleaved measurements of complementary observables.
The readout belongs inside the logical channel,
not as an isolated component fidelity.
Noise and Decoherence Ledger
Section titled “Noise and Decoherence Ledger”Residual hybridization
Section titled “Residual hybridization”Finite overlap produces a Hamiltonian term
Within the code space, some coefficients act as unwanted logical fields. Slow drift dephases superpositions; a stable coefficient accumulates a coherent phase. Echoes or calibration may suppress one component, but they turn passive storage into an actively controlled experiment.
Quasiparticle poisoning
Section titled “Quasiparticle poisoning”An electron entering or leaving a superconducting island changes fermion parity. The measured switching time is a key hardware metric, but it is not , , or a logical process lifetime. A superposition can dephase within one parity sector while parity remains unchanged.
Charging energy, gap engineering, quasiparticle traps, infrared shielding, filtering, and reduced nonequilibrium quasiparticle density can improve poisoning. Their benefits must be measured during the actual control and readout sequence, because tunnel couplers and detectors can open new poisoning paths.
Thermal anyons and unintended charge
Section titled “Thermal anyons and unintended charge”For an excitation energy , equilibrium density is suppressed schematically as
Exponential suppression is valuable, but a thermally created pair can separate and execute a logical worldline before annihilating. Two-dimensional topological order is generally not a self-correcting memory at nonzero temperature. Active detection and decoding remain necessary over long times.
Diabaticity and leakage
Section titled “Diabaticity and leakage”Changing a gate voltage, moving a domain wall, or turning on a parity loop can couple the code space to above-gap or unintended subgap states. Leakage depends on the full spectral path, not only the initial gap. A slow ramp can reduce diabatic excitation while increasing exposure to splitting and poisoning, producing the operating-window tradeoff above.
Measurement and control faults
Section titled “Measurement and control faults”Detector noise, resonator photons, charge noise, flux noise, pulse miscalibration, crosstalk, and imperfect turn-off produce ordinary hardware errors. Topology does not suppress a controller that measures the wrong Majorana product. Shared sensors and couplers can generate correlated faults that are especially damaging to an outer code.
Fabrication and tune-up failures
Section titled “Fabrication and tune-up failures”A scalable array must reproducibly realize a gapped operating region, suitable end modes, working quantum dots, usable charging energies, and compatible resonators. Yield and tune-up complexity can dominate long before intrinsic logical error does. A single hand-tuned device does not establish an array architecture.
Connectivity and Scaling Architectures
Section titled “Connectivity and Scaling Architectures”The parity-measurement graph
Section titled “The parity-measurement graph”In measurement-based Majorana designs, connectivity means which Majorana products can be measured without unacceptable crosstalk, not merely which islands are adjacent. A logical operation can require:
- an intra-island bilinear measurement;
- a joint parity involving modes on neighboring islands;
- an ancillary pair or qubit;
- repeated outcomes for fault detection;
- classical feed-forward and Pauli-frame updates.
The graph must support those operations in parallel. A tiling with many geometric neighbors can still have low usable connectivity if loops share dots, resonators, magnetic flux, or control lines.
From tetrons to an outer code
Section titled “From tetrons to an outer code”Passive Majorana protection is not expected to remove all faults. Proposed architectures therefore place tetrons or hexons beneath a qubit or Majorana-fermion code. Repeated joint-parity measurements can implement surface-code-like checks, lattice surgery, or fermionic-code operations.
This creates two protection scales:
The first map reflects the material, island, and parity-measurement module. The second reflects active code distance , circuit faults, and decoding. A lower tetron error can reduce outer-code overhead, but only a measured trend demonstrates the combined architecture.
Full resource boundary
Section titled “Full resource boundary”For each encoded qubit, count at least:
| Resource | Why it matters |
|---|---|
| topological segments and end modes | physical encoding and yield |
| superconducting islands and charging energies | parity constraint and poisoning |
| electrostatic and cutter gates | tune-up, coupling, residual interactions |
| quantum dots and charge sensors | parity selection and measurement |
| resonators, amplifiers, and wiring | bandwidth, multiplexing, cryogenic load |
| magnetic field and alignment | phase access and array compatibility |
| reset and quasiparticle management | cycle time and correlated faults |
| controller, classifier, and decoder | latency and logical decisions |
| magic-state resources | universal computation |
| outer-code ancillas and routing | scalable fault tolerance |
An architecture drawing is not evidence that all rows can be manufactured, tuned, and operated simultaneously.
Metrics That Survive Comparison
Section titled “Metrics That Survive Comparison”Gap and temperature margin
Section titled “Gap and temperature margin”Report the relevant induced or many-body gap , the electron or anyon temperature, and evidence that the gap remains open across the operating path. The ratio is informative but does not capture nonequilibrium quasiparticles or accidental subgap states.
Splitting versus separation
Section titled “Splitting versus separation”A single small splitting is an ingredient. Protection requires a controlled trend with length or separation, including uncertainty and possible oscillations:
Comparing different devices can confuse length scaling with fabrication variation; includes oscillatory and device-specific factors. The strongest test changes the protection scale while holding the rest of the module as fixed as possible.
Parity lifetime and coherent lifetime
Section titled “Parity lifetime and coherent lifetime”Measure poisoning, relaxation, Ramsey-like dephasing, and logical process decay separately. If only a parity telegraph signal is available, call its dwell time a parity-switching time. Do not relabel it as the number of coherent gates available.
Measurement performance
Section titled “Measurement performance”For equal prior probabilities and conditional assignment errors and ,
Also report state preparation, measurement-induced transition, leakage, repeatability, integration, reset, and total round times. Postselection must include acceptance probability and the fate of rejected runs.
Logical operation and protection scaling
Section titled “Logical operation and protection scaling”Characterize a logical channel over a state ensemble rather than quoting one basis-state success probability. Suitable quantities include process fidelity, leakage, worst-case bounds, and repeated-cycle decay. For a protected architecture, the decisive evidence is
under matched operation and accounting conditions. The independent variable must actually increase the proposed protection.
Physical Routes and Their Tradeoffs
Section titled “Physical Routes and Their Tradeoffs”Semiconductor–superconductor Majorana devices
Section titled “Semiconductor–superconductor Majorana devices”Hybrid nanowires, planar heterostructures, and quantum-dot chains offer electrostatic control, microwave-compatible charge sensing, and a natural path to tetron arrays. Measurement-only protocols can avoid moving Majoranas through physical T-junctions.
Their central challenge is evidentiary as well as engineering. Trivial Andreev states, disorder, soft gaps, multiband structure, and inhomogeneity can mimic local signatures. Large magnetic fields constrain materials, resonators, and array orientation. Many gates and dots must be tuned while preserving the same topological regime.
Vortices, magnetic chains, and two-dimensional candidates
Section titled “Vortices, magnetic chains, and two-dimensional candidates”Majorana modes may occur in vortices of suitable two-dimensional superconductors, magnetic-atom structures, and topological-insulator or Josephson-junction hybrids. Two-dimensional motion is attractive for physical braiding. Vortex pinning, low-lying core states, microscopic placement, fusion-channel readout, and scalable control remain formidable.
Fractional quantum Hall devices
Section titled “Fractional quantum Hall devices”Hall fluids supply intrinsic many-body topological order and established Abelian anyons. Chiral edges offer interferometric access, while gates can shape paths and islands. The operating temperatures, small gaps, edge decoherence, electrostatic drift, and difficulty of controlling individual bulk quasiparticles limit processor-scale architectures.
Programmable topological states
Section titled “Programmable topological states”Conventional processors provide flexible preparation and tomography of non-Abelian models. They are currently the strongest route for testing braid and fusion algebra at increasing particle number. Their logical protection, however, comes from active stabilization and the underlying processor’s error model. They benchmark topological protocols, not intrinsic material topological qubits.
Evidence Through August 2026
Section titled “Evidence Through August 2026”The evidence below is ordered by claim strength rather than publicity.
Theory and several topological phases are established
Section titled “Theory and several topological phases are established”The braid-group and fusion-space framework, Majorana operator algebra, measurement-only computation, and topological-code constructions are standard under their stated assumptions. Integer and fractional quantum Hall phases are experimentally established. Complementary interferometer and collider experiments have directly supported Abelian fractional statistics.
These results establish that topology and anyonic statistics are physical, not merely formal. They do not establish a non-Abelian computational qubit.
Non-Abelian fractional-Hall order remains interpretation-sensitive
Section titled “Non-Abelian fractional-Hall order remains interpretation-sensitive”Even-denominator Hall states, especially near filling , have substantial evidence compatible with non-Abelian order. Interferometry has reported even–odd behavior and other signatures expected for Ising anyons. Competing orders, edge reconstruction, electrostatics, and disorder can share important observables.
A January 2026 bilayer-graphene experiment observed coherent Aharonov–Bohm interference at two even-denominator states and behavior consistent with added charge . Its period remained compatible with both a non-Abelian double-winding interpretation and an Abelian -quasiparticle alternative. As of the review date, no intrinsic Hall device has combined controlled initialization, noncommuting braids, fusion-basis readout, and protection scaling in one qubit module.
Majorana parity readout is real; phase identification is disputed
Section titled “Majorana parity readout is real; phase identification is disputed”In 2025, an InAs–Al hybrid device demonstrated time-resolved, interferometric single-shot parity measurement with an optimal reported assignment error near and millisecond-scale parity dwell times. The paper explicitly stated that the measurement alone does not uniquely distinguish topological Majorana modes from fine-tuned trivial Andreev states.
In June 2026, a peer-reviewed Nature Matters Arising analysis argued that transport data underlying the tune-up placed the measured devices in disordered, apparently gapless regions, challenging the topological interpretation. The authors’ published reply disputed that conclusion and argued that the RF parity signal strongly constrains trivial explanations. The exchange leaves a live interpretation dispute. The conservative hardware statement is firm: a valuable parity-readout primitive was demonstrated; topological phase identification and protected-qubit operation were not settled by that measurement.
Short Kitaev chains have reached readout and coherent control
Section titled “Short Kitaev chains have reached readout and coherent control”A two-site quantum-dot Kitaev chain was realized in 2023. A three-site chain reported enhanced stability in 2025. In February 2026, single-shot parity readout of a minimal chain resolved millisecond-scale switching and charge-neutral parity states.
A July 2026 preprint then reported coherent parity oscillations between two coupled two-site chains, with behavior consistent with a Majorana parity qubit near the sweet spot. The authors describe the chains as short and only partially protected. This is qubit-level coherent control in an engineered Majorana basis, not an experimental demonstration of exponential length protection, non-Abelian braiding, or a fault-tolerant gate.
Tetron lifetimes are improving, but the measured quantity matters
Section titled “Tetron lifetimes are improving, but the measured quantity matters”A 2025 tetron preprint reported two interferometric loop measurements intended as logical and , with substantially different switching times and assignment errors. A June 2026 InAs–Pb tetron preprint reported a characteristic -parity switching time near , with some intervals reaching minute scale, in one measured wire of a multi-tetron device.
Those are notable materials, poisoning, and readout results. As preprints, they still await the weight of peer review and independent replication. More fundamentally, a long dwell time does not establish coherent storage of arbitrary superpositions, complementary high-fidelity Pauli measurements, a protected braid, or logical-error suppression with increasing wire length.
Synthesized non-Abelian operations are established
Section titled “Synthesized non-Abelian operations are established”Programmable processors have crossed several algebraic milestones:
- a superconducting processor demonstrated non-Abelian braiding of engineered graph vertices in 2023;
- a trapped-ion processor prepared a non-Abelian topological state and measured creation, fusion, braiding, and a Borromean process in 2024;
- a superconducting processor simulated Fibonacci string-net states and measured universal braid action in 2024;
- a 54-qubit trapped-ion experiment published in July 2026 used anyons to demonstrate a universal logical gate set from braiding and fusion, including topological magic-state preparation.
These are controlled demonstrations of non-Abelian encoding and gate algebra. They do not show that the ion or transmon hardware passively suppresses local errors through an intrinsic topological phase. The 2026 result advances universality and control, while fault-tolerant scaling under repeated native noise remains a separate milestone.
Dated status ledger
Section titled “Dated status ledger”| Claim | Status on 10 August 2026 | Main missing evidence |
|---|---|---|
| braid and fusion framework | established theory | none within stated axioms |
| Abelian fractional-Hall anyons | experimentally established | non-Abelian computation is a separate claim |
| non-Abelian fractional-Hall qubit | strong candidate matter evidence | controlled basis-sensitive braids and scalable readout |
| solid-state topological Majorana qubit | active and disputed | convergent phase identification, coherent complementary control, protection scaling |
| minimal-chain Majorana parity qubit | coherent-control preprint | longer chains, braid or fusion test, scaling |
| InAs–Pb tetron long parity lifetime | June 2026 preprint | peer review, complementary observables, coherent logical channel |
| processor-synthesized non-Abelian gates | demonstrated | native protection and decreasing logical error |
| scalable intrinsic-anyon processor | not demonstrated | complete architecture contract |
No entry in the final row has been promoted by the peer-reviewed experimental record as of the review date.
Advantages and Bottlenecks
Section titled “Advantages and Bottlenecks”Potential advantages
Section titled “Potential advantages”- Nonlocal encoding: selected local perturbations have exponentially small logical matrix elements in the ideal regime.
- Discrete protected gates: braids or measurement-only equivalents can depend on topology rather than pulse area.
- Biased error model: parity-preserving local noise and parity-changing poisoning can have very different rates, which an outer code may exploit.
- Potentially lower correction overhead: better physical modules could reduce the distance and cycle burden of active codes.
- Natural fusion and parity measurements: the observables needed for computation align with the encoded degrees of freedom.
Central bottlenecks
Section titled “Central bottlenecks”- unambiguous phase and mode identification in solid-state candidates;
- reproducible gaps, long-enough structures, and low subgap-state density;
- fast, high-fidelity complementary parity measurements;
- poisoning and detector-induced transitions during operation;
- non-Abelian fusion or braid demonstrations in intrinsic matter;
- non-Clifford resource quality and distillation overhead;
- fabrication yield, tune-up, magnetic-field compatibility, and multiplexed RF readout;
- decreasing total logical error as protection resources increase;
- full comparison against improving conventional qubits and bosonic modules.
The promise is reduced error sensitivity, not reduced experimental rigor.
A Practical Claim Audit
Section titled “A Practical Claim Audit”When a result is described as a “topological qubit,” ask the following in order.
1. Where does topology live?
Section titled “1. Where does topology live?”Is it an intrinsic many-body phase, a Bogoliubov defect sector, a synthesized wavefunction, or an actively stabilized code? State the substrate separately.
2. What is the logical Hilbert space?
Section titled “2. What is the logical Hilbert space?”List the anyons or Majoranas, total charge or parity constraint, logical basis, and leakage sectors. Two end modes and a telegraph signal are not yet this ledger.
3. What operation was performed?
Section titled “3. What operation was performed?”Separate spectroscopy, parity measurement, coherent rotation, fusion, physical braid, measurement-only braid, and outer-code check. Name the observable and control sequence.
4. Which part was protected?
Section titled “4. Which part was protected?”Identify the local errors that topology suppresses. Then list unsuppressed faults from poisoning, readout, leakage, dynamical phases, and non-Clifford resources.
5. What scaled?
Section titled “5. What scaled?”Look for matched measurements versus length, separation, temperature, or code distance. One long lifetime at one device size is component evidence.
6. What is the architecture boundary?
Section titled “6. What is the architecture boundary?”Count sensors, quantum dots, resonators, control lines, reset, decoder, outer code, magic-state resources, calibration, and rejected runs. Compare complete logical tasks, not ideal anyons with complete competing systems.
Common Mistakes
Section titled “Common Mistakes”“A zero-bias peak proves a topological qubit”
Section titled ““A zero-bias peak proves a topological qubit””Trivial Andreev and other subgap states can produce near-zero signatures. A qubit additionally requires a constrained nonlocal Hilbert space, control, readout, and protection evidence.
“Two Majoranas make one qubit”
Section titled ““Two Majoranas make one qubit””One pair defines a fermion occupation whose two states differ in total parity. A parity-conserving qubit requires at least four Majoranas or an equivalent multi-island ledger.
“Parity lifetime is coherence time”
Section titled ““Parity lifetime is coherence time””Parity can remain fixed while a superposition dephases from residual splitting or noise. Report poisoning, relaxation, dephasing, and process decay separately.
“Measurement-only means no control hardware”
Section titled ““Measurement-only means no control hardware””Measurement-only braiding requires tunable couplers, ancillas, detectors, reset, a schedule, feed-forward, and Pauli-frame tracking.
“Braiding Majoranas gives a universal computer”
Section titled ““Braiding Majoranas gives a universal computer””Ising-anyon braids generate Clifford operations. Universal computation needs a non-Clifford resource and its error-correction overhead.
“Anyons on a processor prove intrinsic anyons in the hardware”
Section titled ““Anyons on a processor prove intrinsic anyons in the hardware””Programmed anyons are encoded excitations of a synthesized state. They test the intended algebra, while the substrate and protection mechanism remain those of the processor.
“A protected primitive is a fault-tolerant architecture”
Section titled ““A protected primitive is a fault-tolerant architecture””Fault tolerance requires composable preparation, gates, measurement, reset, correction, and improving logical error under scaling.
“The larger gap explains every improvement”
Section titled ““The larger gap explains every improvement””A gap can suppress equilibrium excitation and poisoning, but readout settings, shielding, device geometry, disorder, and nonequilibrium populations can change simultaneously. Causal claims require controlled comparisons.
“A proposed array is already scalable”
Section titled ““A proposed array is already scalable””Scalability is an experimental statement about yield, tune-up, parallelism, cross-talk, cryogenic load, and logical performance, not a property of a layout drawing.
Exercises
Section titled “Exercises”1. Count a fixed-parity Majorana space
Section titled “1. Count a fixed-parity Majorana space”Show that Majoranas span a -dimensional sector when total fermion parity is fixed. How many qubits can four and six Majoranas encode mathematically?
Solution
Pair the Majoranas into ordinary fermions,
Their occupations give states. Total parity fixes
so only half of the occupation strings remain. Thus
Four Majoranas have and encode one qubit. Six have and span two qubits mathematically. A hardware hexon may reserve one of those degrees of freedom as an ancilla, so logical use depends on the architecture rather than dimension alone.
2. Verify the Majorana Pauli algebra
Section titled “2. Verify the Majorana Pauli algebra”Using
show that and .
Solution
For , and . Hence
Also,
Reversing the order gives , so and anticommute. The algebra is valid after restricting to the fixed-parity code space.
3. Conjugate a Majorana by a braid
Section titled “3. Conjugate a Majorana by a braid”For
derive the action of on and . Explain why a choice of braid orientation matters.
Solution
The commutators are
Exponentiating this rotation gives
Replacing by reverses the signs and corresponds to the opposite exchange orientation. Physical braid claims must therefore specify worldline orientation and operator convention, not only say that two modes were exchanged.
4. Check an adiabatic operating window
Section titled “4. Check an adiabatic operating window”A candidate device has , , and . Estimate and . Which upper bound controls the operating window?
Solution
Using ,
or about . Similarly,
or about . The splitting bound is much shorter than the poisoning time, so the schematic window is
Whether a practical pulse fits comfortably inside it requires the actual spectral path, control bandwidth, and error target. Merely satisfying the inequalities by a small numerical factor is not enough.
5. Majority vote for a parity detector
Section titled “5. Majority vote for a parity detector”An ideal QND parity detector has independent assignment error per shot. Compute the error of a three-shot majority vote. Why is this calculation optimistic for a real device?
Solution
The vote is wrong if exactly two or all three assignments are wrong:
Thus the idealized vote reduces assignment error from to about . Real repetitions take time. Parity can switch between shots, measurement can cause transitions, errors can be correlated, and reset or threshold drift can invalidate the independent-identical-error model. A majority-vote number is meaningful only with those effects measured.
6. Separate parity stability from coherence
Section titled “6. Separate parity stability from coherence”Construct a Hamiltonian that preserves total parity but dephases a Majorana qubit superposition. What experiment would distinguish the two lifetimes?
Solution
Residual overlap can act within the fixed-parity code space as
It commutes with total parity, so a parity telegraph record can remain stable. Nevertheless, fluctuations of randomize the relative phase of
A dwell-time measurement estimates poisoning or parity-switching time. A Ramsey or process-tomography experiment using preparation and readout in complementary logical bases estimates coherent dephasing. Both are needed.
7. Extract a localization length
Section titled “7. Extract a localization length”Two otherwise matched devices have measured splittings and . Ignoring oscillations, estimate from . Give two reasons not to call this alone proof of topology.
Solution
The ratio gives
Therefore
The inference ignores the oscillatory factor and assumes the devices differ only in length. Fabrication disorder, confinement, tunnel broadening, or a trivial partially separated state can also change the splitting. A topology claim needs bulk and nonlocal diagnostics plus operation-level evidence.
8. Complete the gate set
Section titled “8. Complete the gate set”Suppose perfect Majorana braids provide every logical Clifford gate. Why is the processor still not universal, and what resource must be added?
Solution
Clifford circuits acting on stabilizer states and followed by Pauli measurements are not universal for quantum computation. A non-Clifford operation, commonly represented by
must be supplied. A Majorana architecture can create an approximate magic state using an unprotected dynamical operation, verify or distill many noisy copies, and inject the resulting state using protected Clifford operations and measurement. The physical preparation, factories, distillation failures, and routing belong in the architecture cost.
9. Count a toy tetron array
Section titled “9. Count a toy tetron array”A rectangular array contains tetrons. Each tetron uses two topological wire segments, four Majorana end modes, and one readout resonator. Every horizontal nearest-neighbor bond uses one additional shared parity coupler. Count each resource.
Solution
There are
tetrons, hence wire segments, Majorana end modes, and readout resonators. If the first dimension labels columns, each of the eight rows has five horizontal bonds, so the number of shared couplers is
This count still omits islands, electrostatic gates, vertical links, amplifiers, wiring, reset hardware, controller channels, outer-code ancillas, and non-Clifford resources. “48 qubits” is only the first line of the bill of materials.
10. Classify four claims
Section titled “10. Classify four claims”Assign the most defensible status to each statement:
- a device shows a stable zero-bias peak at both ends;
- an interferometer resolves two parity values in single shots;
- a processor prepares a string-net state and measures noncommuting braid sequences;
- logical error decreases over several distances during repeated universal operation.
Solution
- Candidate mode signature. Correlated end response is stronger than one local peak, but trivial low-energy states and phase identification still require controls.
- Parity-readout ingredient. The sensor operation is established under its calibration; topology, coherent qubit control, and protection scaling remain separate.
- Controlled simulation of non-Abelian algebra. It demonstrates encoded braid operations in the synthesized state, not necessarily intrinsic material anyons or passive hardware protection.
- Fault-tolerant logical evidence, provided preparation, readout, acceptance, and resources are matched and all logical operations are included. This is the strongest claim and has not yet been demonstrated by an intrinsic-anyon processor.
References
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Further Connections
Section titled “Further Connections”- Hardware Overview supplies the platform-neutral comparison axes and claim ladder.
- Metrics for Quantum Hardware develops fidelity, leakage, uncertainty, and logical benchmarking.
- Control, Readout, and Calibration treats the shared controller and detector layer.
- Materials and Fabrication Interface connects epitaxy, interfaces, disorder, wafer variation, hard-gap evidence, device yield, parity-channel acceptance, and protection claims without treating a materials signature as a qubit.
- Topological Order develops ground-state degeneracy, local indistinguishability, and long-range entanglement.
- Fractional Quantum Hall Effect owns Hall-fluid phenomenology and quasiparticle evidence.
- Quantum Information Roadmap places hardware after states, channels, circuits, and error correction.