Lattice Surgery

Lattice surgery implements fault-tolerant logical operations by changing which local checks are measured along the boundaries of encoded patches. Its central primitive is not a geometric animation of patches fusing and separating. It is a protected measurement of a joint logical Pauli operator, such as

$$\overline Z_A\overline Z_B \qquad\text{or}\qquad \overline X_A\overline X_B.$$

The interface checks are local even though their decoded product reveals a nonlocal logical parity. Repeating those checks in time protects the parity against measurement faults; maintaining sufficient width around the interface protects it against data faults. Merge, split, routing, CNOT, teleportation, and multi-patch Pauli measurements can all be understood from this one idea.

Lattice surgery is especially natural for planar topological codes on two-dimensional nearest-neighbor hardware. It avoids the pairwise long-range interactions required by a transversal gate between separate patches. That advantage is not free. Surgery consumes boundary length, routing area, syndrome rounds, decoder work, and classical reaction time. A logically correct parity projector is only fault tolerant when the complete spacetime operation retains the declared distance.

Canonical Scope

Surface Code owns surface-code stabilizers, logical strings, boundary geometry, repeated syndrome extraction, code-specific thresholds, and static patch overhead. The Threshold Theorem owns the general asymptotic theorem, its noise assumptions, and overhead logic. Fault-Tolerant Gates owns the general error-containment contract and compares surgery with transversal, deformation, gauge-fixing, pieceable, and teleportation-based mechanisms. Decoders owns general syndrome inference.

This page is the canonical home for lattice-surgery conventions, rough and smooth merges and splits, joint-parity projectors, the measurement-based CNOT correction table, time-dependent decoding, multi-patch measurements, twist variants, routing, and scheduling. Magic State Distillation owns resource-state purification and factories; surgery supplies many of the logical measurements used inside those protocols.

Experimental statements below use an evidence cutoff of 11 August 2026. The logical constructions are established. Which layouts, decoders, and hardware implementations minimize delivered logical error and spacetime cost remains an active engineering question.

Quantum Error Correction and Fault Tolerance routes here when a protected architecture uses joint logical parity measurements and code deformation; this page retains seam checks, merges, splits, logical CNOT construction, spacetime fault tolerance, decoding, layout, routing, and operation evidence.

Conventions Before Geometry

Consider a planar CSS patch encoding one logical qubit. We use the standard surface-code naming convention:

• a rough boundary permits a physical $Z$ string to terminate;
• a smooth boundary permits a physical $X$ string to terminate;
• $\overline Z$ can be represented by a $Z$ string joining opposite rough boundaries;
• $\overline X$ can be represented by an $X$ string joining opposite smooth boundaries.

Some diagrams rotate the patch, exchange primal and dual lattices, or swap the words rough and smooth. The operational statement is safer than the nickname: identify the logical product represented by the decoded interface checks. In the convention used here,

Operation	Interface action	Logical information obtained
rough merge	prepare seam data in $	0\rangle$and measure new$X$-type checks
smooth merge	prepare seam data in $	+\rangle$and measure new$Z$-type checks
rough split	measure the separating data row in the $Z$ basis	creates rough boundaries
smooth split	measure the separating data row in the $X$ basis	creates smooth boundaries

The seam preparation commutes with the checks that were already well defined on the separate patches. The newly introduced checks need not have individually predictable first outcomes. Their corrected product carries the logical parity.

The Logical Parity Projector

For a Pauli product $P$ with eigenvalues $\pm1$, encode the measurement outcome as a bit $m\in\{0,1\}$, so the reported eigenvalue is $(-1)^m$. The ideal projector is

$$\Pi_m^{(P)} = \frac{I+(-1)^mP}{2}.$$

For an input density operator $\rho$, the outcome probability and normalized post-measurement state are

$$p_m = \operatorname{Tr}\!\left(\Pi_m^{(P)}\rho\right),$$ $$\rho_m = \frac{ \Pi_m^{(P)}\rho\Pi_m^{(P)} }{ p_m }.$$

For a two-patch $ZZ$ surgery, set $P=\overline Z_A\overline Z_B$. This measures whether the logical computational-basis labels have equal or unequal parity. It does not measure either logical $Z$ separately. For example,

$$\frac{ \Pi_0^{(ZZ)}|++\rangle }{ \sqrt{\langle++|\Pi_0^{(ZZ)}|++\rangle} } = \frac{|00\rangle+|11\rangle}{\sqrt2},$$

while the odd outcome gives

$$\frac{ \Pi_1^{(ZZ)}|++\rangle }{ \sqrt{\langle++|\Pi_1^{(ZZ)}|++\rangle} } = \frac{|01\rangle+|10\rangle}{\sqrt2}.$$

Coherence within one parity sector is preserved in the ideal operation. Revealing which individual patch carried the $1$ would destroy that coherence and would not implement the same channel.

The analogous $XX$ projector distinguishes equal and unequal labels in the Hadamard basis. Joint parity is therefore both a measurement and an entangling resource.

What the Seam Checks Measure

Let $\mathcal S_{\rm sep}$ be the stabilizer group while patches $A$ and $B$ are separate. During a merge, selected boundary checks are replaced by a set of local interface checks

$$Q_1,\ldots,Q_r.$$

For the intended geometry, their product is equivalent on the old code space to a joint logical Pauli, up to a known old stabilizer and sign:

$$\prod_{j=1}^{r}Q_j = \sigma_{\rm geom}\, S_{\rm old}\, \overline P_A\overline P_B, \qquad S_{\rm old}\in\mathcal S_{\rm sep}.$$

If the old stabilizer frame is known, corrected interface eigenvalues $\widetilde q_j\in\{\pm1\}$ yield

$$(-1)^m = \sigma_{\rm frame} \prod_{j=1}^{r}\widetilde q_j.$$

The sign $\sigma_{\rm frame}$ includes geometry conventions, old stabilizer eigenvalues, data-measurement outcomes, and tracked Pauli-frame changes. A diagram that says only “multiply the seam checks” is incomplete unless these sign conventions are fixed.

Why repeated rounds are needed

The new checks have no reliable comparison value from the preceding static round. A readout fault can flip an interface outcome, and a string of time-directed measurement faults can flip the decoded logical parity without leaving an endpoint inside the observed spacetime window. For a nominal distance-$d$ operation, the standard construction runs the merged check set for order $d$ syndrome rounds and supplies appropriate temporal boundary conditions to the decoder.

The slogan “run $d$ rounds” is a design rule, not a proof. The check circuit, hook orientation, first and last round, reset policy, final data measurement, and decoder graph must together give spacetime distance at least $d$ for both data preservation and the reported parity.

Rough and Smooth Merges

A merge changes two encoded patches into one larger stabilizer code while recording one logical parity bit. The quantum degree of freedom conjugate to that parity is projected. The classical outcome plus the remaining encoded degree of freedom account for the information after measurement.

Rough merge: logical XX

Place rough boundaries of patches $A$ and $B$ along an interface. Prepare any new seam data qubits in $|0\rangle$, then introduce the prescribed $X$-type checks spanning the interface. After the time-dependent syndrome is decoded, their corrected product gives

$$M_{XX} = \overline X_A\overline X_B.$$

The ideal logical action is the projector

$$\Pi_{m_X}^{(XX)} = \frac{ I+(-1)^{m_X}\overline X_A\overline X_B }{2}.$$

The child patch’s logical $Z$ may be represented by a product of parent logical $Z$ strings, while its logical $X$ can be represented by either parent string after a frame convention is chosen. Exact representatives depend on orientation and on which boundary checks were replaced.

Smooth merge: logical ZZ

Place smooth boundaries along the interface. Prepare new seam data in $|+\rangle$ and introduce the corresponding $Z$-type interface checks. Their corrected product gives

$$M_{ZZ} = \overline Z_A\overline Z_B,$$

with projector

$$\Pi_{m_Z}^{(ZZ)} = \frac{ I+(-1)^{m_Z}\overline Z_A\overline Z_B }{2}.$$

The $X$ and $Z$ roles are exchanged relative to a rough merge. In both cases, individual new-check outcomes can be random even when the logical product is deterministic.

A merge is not a unitary gate

Two encoded qubits enter a merge and one encoded degree of freedom remains in the child patch. The missing quantum degree has become a classical measurement outcome. A subsequent split can return to two patches, but it does not restore coherence between parity sectors erased by the measurement. A merge followed by a split is a protected parity measurement, not the identity channel.

Rough and Smooth Splits

A split removes a row of data qubits and restores two separately stabilized patches. The measurement outcomes determine new boundary stabilizer signs and logical frames. After decoding and frame updates, the ideal action is an isometry from one logical qubit into a correlated two-qubit subspace.

Smooth split

Measure the separating row in the $X$ basis to create smooth boundaries. Ignoring a known byproduct, the logical isometry $V_Z$ is

$$V_Z|0\rangle=|00\rangle, \qquad V_Z|1\rangle=|11\rangle.$$

Thus

$$V_Z \left( \alpha|0\rangle+\beta|1\rangle \right) = \alpha|00\rangle+\beta|11\rangle.$$

The logical-operator map is

$$V_Z\overline Z = \overline Z_1V_Z = \overline Z_2V_Z,$$ $$V_Z\overline X = \overline X_1\overline X_2V_Z.$$

The output lies in the $+1$ eigenspace of $\overline Z_1\overline Z_2$. Starting from $|+\rangle$ therefore prepares a logical Bell state, up to the tracked frame.

Rough split

Measure the separating row in the $Z$ basis to create rough boundaries. In the Hadamard basis, the ideal isometry $V_X$ is

$$V_X|+\rangle=|++\rangle, \qquad V_X|-\rangle=|--\rangle.$$

Its operator map is

$$V_X\overline X = \overline X_1V_X = \overline X_2V_X,$$ $$V_X\overline Z = \overline Z_1\overline Z_2V_X.$$

This is not cloning. The daughters are generally entangled, and neither reduced state equals an arbitrary pure input state.

Distance during a split

The mother patch must be large enough that each daughter retains the target distance. Splitting a square distance-$d$ patch through its middle can create a short logical path of order $d/2$. To produce two distance-$d$ daughters, one commonly starts from an elongated patch with transverse dimensions chosen for both outputs. Corners, disabled checks, and the measurement row must be included when finding the shortest logical path.

One convention for a measurement-based logical CNOT. Each parity box denotes a fault-tolerant, decoded lattice-surgery operation lasting multiple syndrome rounds, not an instantaneous two-qubit measurement. The final frame is $Z_C^{m_{XX}}X_T^{m_{ZZ}\oplus m_Z}$.

A Logical CNOT from Parity Measurements

Let $C$ be the control, $T$ the target, and prepare an ancilla logical qubit $A$ in $|+\rangle$. Perform, in order:

1. measure $\overline Z_C\overline Z_A$, obtaining bit $m_{ZZ}$;
2. measure $\overline X_A\overline X_T$, obtaining bit $m_{XX}$;
3. measure $\overline Z_A$, obtaining bit $m_Z$.

The measurements can be implemented by smooth and rough surgery with an ancilla or routing patch. The logical derivation does not depend on the microscopic layout.

Deriving the byproducts

Let

$$s_1=(-1)^{m_{ZZ}}, \qquad s_2=(-1)^{m_{XX}}, \qquad s_3=(-1)^{m_Z}.$$

The Kraus operator acting on $C$ and $T$ is

$$\begin{aligned} K_{m_{ZZ},m_{XX},m_Z} ={}& \langle m_Z|_A \frac{I+s_2X_AX_T}{2} \frac{I+s_1Z_CZ_A}{2} |+\rangle_A \\ ={}& \frac{1}{4\sqrt2} \left( I+s_1s_3Z_C+s_2X_T -s_1s_2s_3Z_CX_T \right). \end{aligned}$$

Using

$$\operatorname{CNOT}_{C\to T} = \frac12 \left( I+Z_C+X_T-Z_CX_T \right),$$

one obtains, up to an outcome-dependent global phase,

$$K_{m_{ZZ},m_{XX},m_Z} = \frac{1}{2\sqrt2} X_T^{\,m_{ZZ}\oplus m_Z} Z_C^{\,m_{XX}} \operatorname{CNOT}_{C\to T}.$$

The physical measurement branch therefore produces the desired CNOT followed by known Pauli byproducts. They may be applied or, more commonly, recorded in a logical Pauli frame.

$m_{ZZ}$	$m_{XX}$	$m_Z$	frame update
0	0	0	none
0	0	1	$X_T$
0	1	0	$Z_C$
0	1	1	$Z_CX_T$
1	0	0	$X_T$
1	0	1	none
1	1	0	$Z_CX_T$
1	1	1	$Z_C$

Different ancilla preparations, measurement orderings, bit conventions, or choices of output frame produce different-looking tables. A protocol must state its circuit before quoting corrections. The invariant content is that the branch differs from CNOT by a known Clifford, here a Pauli.

Logical schedule versus patch schedule

At the logical level the construction contains two sequential parity measurements and one destructive ancilla measurement. In a patch layout, each parity measurement expands into seam preparation, a time-dependent check schedule, order-$d$ syndrome rounds, decoding, and frame extraction. Patch initialization, split operations, movement, and final boundary restoration may add cycles. Quoting “two measurements” is not a physical runtime estimate.

Fault Tolerance Is a Spacetime Property

Static patch distance does not certify a surgery. Let $\mathcal F_{\rm undet}$ be the set of fault chains that cause either an incorrect logical output or an incorrect reported parity while producing no distinguishable detector pattern. Define the operation distance

$$d_{\rm op} = \min_{\Gamma\in\mathcal F_{\rm undet}} |\Gamma|.$$

A distance-$d$ protocol aims for $d_{\rm op}\geq d$ under its declared circuit-level fault model. Three broad classes of minimal chain must be checked:

• spacelike chains cross a patch, interface, neck, or routing strip;
• timelike chains corrupt enough repeated measurements to flip the logical parity;
• mixed chains use data, hook, measurement, leakage, and boundary faults along a diagonal path through the transition.

The shortest chain can change when a check is turned on or off. A neck that looks $d$ qubits wide in one drawing may have a shorter diagonal path in the actual CNOT schedule. Corners and twists can create high-weight checks whose ancilla faults spread differently from bulk checks.

For a local stochastic circuit model, one often fits a surgery failure rate to a form such as

$$p_{\rm surg}(d) \approx A_{\rm surg}(d) \left( \frac{p}{p_{\rm th,surg}} \right)^{(d_{\rm op}+1)/2}.$$

This is a model-dependent scaling ansatz, not a universal law. The prefactor, threshold, effective distance, and even the relevant scalar physical error $p$ depend on the check circuit, decoder, leakage handling, bias, and observable being benchmarked.

Hook errors and check order

An ancilla fault during a multi-data-qubit check can propagate to a correlated data error. The order of two-qubit gates should orient these hooks so they do not shorten a logical path. At a changing boundary, a schedule safe for the static bulk may be unsafe: elongated checks, half checks, and twist checks have different supports. A circuit-level surgery specification must publish the gate order, not only the stabilizer generators.

First and last rounds

The first interface-check outcomes establish new gauge or stabilizer values. The last rounds must connect those values to the restored patches or to final data measurements. If the decoder simply compares every check with a nonexistent previous value, it invents detectors; if it drops the temporal boundary, a measurement-error chain may escape.

Fault tolerance can be understood as a gauge-fixing process. The separate, merged, and split descriptions select different commuting subsets of an enlarged gauge group. That algebra explains why the logical channel is well-defined. It does not replace the spacetime circuit and decoder proof.

Decoding a Changing Stabilizer Code

For a persistent check with measured signs $s_i(t)$, a simple detector is a change between rounds,

$$d_i(t) = s_i(t)s_i(t-1).$$

At a merge or split, some checks appear, disappear, or change support. Transition detectors can combine:

• old boundary-check outcomes;
• first-round interface outcomes;
• single-qubit seam measurements;
• restored boundary checks;
• final data measurements;
• known preparation and Pauli-frame signs.

The decoder should output more than a data correction. It must also estimate the logical parity bit, any boundary-frame changes, and confidence or heralding information needed by the controller. In a detector-error-model description, the parity is a logical observable whose sign can be flipped by certain faults; decoding chooses which compatible fault class is most likely.

Streaming and windows

A large processor cannot wait until the entire computation ends before decoding every surgery. Sliding-window or parallel-window decoders pass boundary information between time windows. Their overlap must be long enough that a fault chain crossing a window boundary is not cut into two harmless pieces. A favorable mean decoder latency is insufficient when an adaptive measurement basis depends on the parity; tail latency can stall the quantum schedule.

Soft information and erasures

Analog readout likelihoods, heralded leakage, atom loss, and flagged hook events can improve inference when the decoder model accepts them. Their value is conditional on calibration. An incorrect erasure flag or stale readout likelihood is itself a noisy observation and must be represented in the detector model.

Multi-Patch Pauli Measurements

The two-patch operators $XX$ and $ZZ$ generalize to

$$\overline P = \bigotimes_{j=1}^{w}\overline P_j, \qquad P_j\in\{I,X,Y,Z\}.$$

An ancilla region or routing strip can touch the appropriate boundary of each participating patch. Local checks along the combined interface are repeated and decoded; their corrected product reports the eigenvalue of $\overline P$. This measurement language is often more efficient than decomposing every logical operation into pairwise CNOT gates and then routing those gates independently.

Increasing the Pauli weight does not automatically require serial time proportional to $w$: separated interfaces may be checked in parallel. However, the ancilla region grows, more corners and routes are exposed, and there are more ways for correlated faults to affect the result. The complete spacetime distance and logical failure probability still depend on $w$ and geometry.

Mixed boundaries and Y factors

Pure products of $X$ operators can meet $X$-accessible boundaries, and pure $Z$ products can meet $Z$-accessible boundaries. A mixed Pauli product may require an ancilla patch whose boundary type changes along its perimeter. The change point is a twist defect or domain-wall endpoint.

Since

$$Y=iXZ,$$

a logical $Y$ factor involves both boundary types and a phase convention. Twist-based lattice surgery supplies local checks around the junction, but those checks can have unusual weight and connectivity. Circuit-level studies find that a good twist schedule can retain useful performance, yet it cannot be assumed equivalent to an ordinary $XX$ or $ZZ$ seam.

Alternatives include rotating a patch boundary, decomposing the measurement, using temporal encodings, or adopting a twist-free construction. These move cost among extra rounds, ancilla space, connectivity, and classical tracking. The appropriate comparison is at fixed delivered logical error.

What Surgery Can Build

Bell and GHZ states

A smooth split implements

$$|+\rangle \longmapsto \frac{|00\rangle+|11\rangle}{\sqrt2}$$

up to a frame. Repeating compatible splits creates a logical GHZ state, provided the mother patch is large enough for every daughter to retain the target distance. The Hadamard-basis counterpart follows from rough splits.

Teleportation and movement

Joint $XX$ and $ZZ$ measurements, logical single-qubit measurements, and prepared ancillas implement encoded teleportation. Information can therefore move through an ancilla channel without physically translating every data qubit. The output location, Pauli frame, route occupancy, and decoder reaction become part of the teleportation contract.

Patch deformation can also move or rotate a patch by adding qubits on one side and measuring them out on another. Calling this “free movement” hides the repeated syndrome rounds and temporary reduction in geometric clearance.

Resource-state consumption

Magic-state injection and distillation circuits can be compiled into multi-patch Pauli measurements. Surgery then acts as the data-plane interface between a resource factory and an algorithm. The factory’s output rate is useful only if routing strips and injection ports can deliver states without blocking data patches. Magic State Distillation owns the resource quality and factory service contract.

Clifford tracking

Many logical Pauli and Clifford corrections can be tracked classically. Tracking changes how future patch boundaries and measurement bases are interpreted; it does not erase all control dependencies. A tracked Hadamard, for example, exchanges the meanings of logical $X$ and $Z$. The scheduler must know which physical boundary currently realizes each tracked operator.

Layout, Routing, and Spacetime Cost

Representing a distance-$d$ patch as one square “tile” and a distance-protected operation as one logical time step is useful for architecture sketches. It is an abstraction. Let

$$A_{\rm patch}(d) \approx a d^2$$

be the active physical-qubit area of one patch and let

$$\tau_{\rm surg}(d) \approx b d\,\tau_{\rm cyc}$$

be one surgery duration. A local constant-size operation then has leading qubit-cycle volume

$$V_{\rm surg}(d) \approx c d^3,$$

with constants set by the layout, check schedule, ancillas, and whether preparation or restoration overlaps other work.

For a routing strip of physical length $L$ and protected width of order $d$,

$$A_{\rm route}=O(Ld), \qquad V_{\rm route}=O(Ld^2)$$

if local checks along the strip run in parallel for order $d$ cycles. If the separation is $R$ logical tiles, then $L=O(Rd)$ and the volume is $O(Rd^3)$. A long-range parity measurement can therefore have distance roughly independent time while still paying distance-dependent area and volume.

Compact and fast layouts

A compact data block exposes few patch boundaries to routing space and uses less area, but serializes many measurements. A fast layout exposes more boundaries and keeps larger ancilla corridors, allowing several commuting measurements in parallel. Intermediate layouts trade area for reaction depth.

The best point depends on the scheduled workload, not only the logical gate count. Two circuits with the same number of CNOTs can have different route contention, Pauli-measurement parallelism, and factory demand.

Resource accounting

A reproducible surgery estimate should distinguish:

$$Q_{\rm total} = Q_{\rm data} +Q_{\rm ancilla} +Q_{\rm route} +Q_{\rm factory} +Q_{\rm spare},$$

and should report:

• active and reserved patch area;
• syndrome-cycle duration;
• operation-specific round counts;
• route and turn widths;
• parallel seam capacity;
• decoder and feedforward latency;
• leakage-removal and reset cycles;
• failed preparation or postselection cost.

Resource Estimation owns the end-to-end workload model that composes these terms; Resource Estimation Tools owns the software workflow and reproducibility record.

Failure Modes That Diagrams Hide

Wrong boundary convention

Swapping rough and smooth labels without checking the interface-check product turns an intended $ZZ$ measurement into $XX$, or vice versa. Define the logical strings and derive the measured product.

Narrow necks and corners

A patch may have nominal width $d$ away from the seam but a shorter logical path around a corner, defect, disabled coupler, or ancilla corridor. Compute distance on every intermediate code.

Timelike parity flips

Repeated data correction can succeed while a vertical chain of measurement faults flips the classical parity bit. Benchmark the logical measurement observable, not only final data errors.

Unsafe hook orientation

A single ancilla fault can spread along a logical direction when the gate order changes at the seam. Include the exact extraction circuit in distance and threshold studies.

Leakage across repeated checks

A leaked ancilla or data qubit can corrupt several rounds and several seam neighbors. Leakage reduction, erasure conversion, and rejected runs belong in the logical channel and throughput accounting.

Frame and sign mismatches

The product of raw seam outcomes is not necessarily the logical answer. Preparation signs, split measurements, prior Pauli frames, and decoder corrections can all flip it.

Decoder handoff failures

Running a static decoder independently before, during, and after surgery can miss chains crossing the transition. Use one time-dependent detector model or prove a valid handoff rule.

Average-rate scheduling

Enough average ancilla area does not prevent a burst of commuting measurements from contending for the same corridor. Compile routes and deadlines, not only counts.

Experimental Status

The evidence establishes increasingly complete pieces of lattice surgery, but the code family, protected error channels, postselection, and operation scale differ.

Result	What was demonstrated	Important boundary
Erhard et al. (2021)	Entangling encoded logical qubits by lattice-surgery-style measurements on a trapped-ion processor	Small perfect-code blocks, not a scalable surface-code patch array
Ryan-Anderson et al. (2024)	High-fidelity logical teleportation using transversal gates and lattice surgery with real-time error correction	Bounded trapped-ion code experiment, not distance scaling of a surface-code seam
Lacroix et al. (2025)	Logical teleportation between distance-three color codes, alongside distance-three-to-five memory scaling	The surgery operation itself was bounded; memory scaling does not automatically establish surgery scaling
Bluvstein et al. (2026)	Ancilla-mediated logical $ZZ$ product measurement in a neutral-atom architecture and comparison with transversal logic	Small logical blocks and specified rounds; not a sustained routed surface-code workload
Besedin et al. (2026)	A split of one distance-three surface-code patch into two distance-three repetition-code outputs with logical process characterization	Fault tolerant against bit flips in the declared circuit, but phase errors were not protected after the split
Wang et al. (2026 preprint)	Operations between two distance-three surface-code logical qubits, logical Bell preparation, a small algorithm, and resource-state injection on superconducting hardware	Preprint evidence; leakage rejection, postselection, small distance, and no increasing-distance operation scaling

These results support the physical reality of joint logical measurements, splits, teleportation, and bounded logical workflows. As of the cutoff, they do not establish a full surface-code lattice-surgery fabric with increasing operation distance, sustained route throughput, real-time decoding, and algorithm-scale delivered logical error. That stronger claim requires all of those elements together.

Reporting Checklist

A lattice-surgery protocol or experiment should report:

1. patch geometry, boundary convention, and logical operator representatives;
2. separate, transition, merged, and restored stabilizer sets;
3. exact seam-data preparations and measurement bases;
4. check-extraction circuit and two-qubit gate order;
5. number and timing of syndrome rounds;
6. detector definitions at first and last transition rounds;
7. decoder, weights, windowing, latency, and use of soft information;
8. formula mapping corrected physical outcomes to each logical parity bit;
9. Pauli or Clifford frame update table;
10. operation distance for data and measurement failures;
11. circuit-level noise, leakage, erasure, crosstalk, and drift assumptions;
12. logical process metric, uncertainty, postselection, and acceptance;
13. data, ancilla, route, and buffer area plus qubit-cycle volume;
14. which conclusions are proofs, simulations, component demonstrations, or integrated workload evidence.

Common Mistakes

Calling a merge a CNOT

A merge measures one joint parity and reduces the encoded quantum degree of freedom. A CNOT requires a sequence of parity measurements, an ancilla measurement, and frame updates.

Treating split as cloning

The split isometry distributes logical operators across two correlated patches. It does not create two independent copies of an unknown state.

Assuming d rounds proves distance d

The temporal length is only one part of $d_{\rm op}$. Hooks, corners, first and last rounds, and decoder boundaries can create shorter fault chains.

Multiplying raw seam outcomes

The logical sign includes decoded corrections and known frame factors. Raw products can be wrong even in an otherwise correct run.

Equating local time with zero distance cost

A long routing strip can be checked in parallel, but its protected width, area, and spacetime volume grow with separation.

Comparing postselected and deterministic channels

Postselection may improve conditional fidelity while lowering throughput. Report acceptance and compare channels under a common service contract.

A Practical Protocol Workflow

1. Declare the logical channel. Specify the parity projector, outcome bit, output patches, and frame convention.
2. Fix boundary geometry. Draw logical representatives on every patch and verify the product of interface checks algebraically.
3. Enumerate stabilizer transitions. Check commutation, encoded dimension, and operator maps at every merge and split.
4. Choose extraction circuits. Orient hooks and include reset, leakage, and connectivity constraints.
5. Build the detector model. Define transition detectors, logical observables, and window handoffs.
6. Audit operation distance. Search spacelike, timelike, and mixed fault chains in the full spacetime circuit.
7. Derive every branch. Produce the parity-sign and frame-update tables from the stated circuit.
8. Compile the layout. Reserve routes, turns, buffers, and parallel seams under a real workload trace.
9. Validate at circuit level. Compare analytic checks, fault enumeration, simulation, and hardware data without changing the accounting boundary.

Connections

• Surface Code supplies the patch stabilizers, boundary strings, and static memory model.
• Color Codes owns triangular colex patches, color-boundary logical representatives, and bounded teleportation evidence; this page retains parity measurements, seams, spacetime decoding, schedules, and routing.
• Fault-Tolerant Gates places surgery inside the ideal-decoder containment contract.
• Decoders develops detector models, correlated-noise inference, windows, latency, and confidence.
• Quantum Software Stack connects logical parity schedules to routing and real-time classical control.
• Magic State Distillation uses protected Pauli measurements to purify and consume non-Clifford resources.
• Fault-Tolerant Quantum Computing Frontier maintains the dated system-level evidence and open integration milestones.

Exercises

1. A parity measurement is not two measurements

Apply an ideal $ZZ$ measurement to $|++\rangle$. Find both conditional states and show that measuring $Z$ on each qubit separately would implement a different channel.

Solution

Since

$$|++\rangle = \frac12 \left( |00\rangle+|01\rangle+|10\rangle+|11\rangle \right),$$

the even and odd projectors give, after normalization,

$$|\Phi^+\rangle = \frac{|00\rangle+|11\rangle}{\sqrt2},$$ $$|\Psi^+\rangle = \frac{|01\rangle+|10\rangle}{\sqrt2}.$$

Each occurs with probability $1/2$. Separate $Z$ measurements reveal one of the four basis strings and destroy coherence between $|00\rangle$ and $|11\rangle$, or between $|01\rangle$ and $|10\rangle$. Forgetting the individual outcomes gives a mixture, not either Bell state.

2. Derive the smooth-split operator map

For $V_Z|0\rangle=|00\rangle$ and $V_Z|1\rangle=|11\rangle$, verify the maps of logical $X$ and $Z$.

Solution

On either basis state,

$$Z_1V_Z|j\rangle = (-1)^j|jj\rangle = V_ZZ|j\rangle,$$

and the same holds for $Z_2$. Also,

$$X_1X_2V_Z|j\rangle = |1-j,1-j\rangle = V_ZX|j\rangle.$$

Therefore

$$V_ZZ=Z_1V_Z=Z_2V_Z, \qquad V_ZX=X_1X_2V_Z.$$

One input logical operator becomes a two-output correlation, which is why the split does not clone an arbitrary state.

3. Derive the CNOT frame

For the parity-measurement CNOT convention on this page, evaluate the ancilla matrix elements and recover the byproduct exponents.

Solution

The required matrix elements are

$$\begin{aligned} \langle m_Z|+\rangle&=\frac1{\sqrt2},\\ \langle m_Z|Z|+\rangle&=\frac{(-1)^{m_Z}}{\sqrt2},\\ \langle m_Z|X|+\rangle&=\frac1{\sqrt2},\\ \langle m_Z|XZ|+\rangle&=-\frac{(-1)^{m_Z}}{\sqrt2}. \end{aligned}$$

Substitution into the two projectors yields

$$K = \frac{1}{4\sqrt2} \left( I+s_1s_3Z_C+s_2X_T-s_1s_2s_3Z_CX_T \right).$$

Comparing with the Pauli expansion of CNOT gives

$$K = \frac{1}{2\sqrt2} X_T^{m_{ZZ}\oplus m_Z} Z_C^{m_{XX}} \operatorname{CNOT}_{C\to T}$$

up to global phase. The two frame bits are therefore $m_{ZZ}\oplus m_Z$ for $X_T$ and $m_{XX}$ for $Z_C$.

4. Find the timelike vulnerability

An interface parity is inferred from $d$ repeated noisy rounds. Explain why a single-round protocol cannot have distance $d>1$ against measurement error, even if both patches retain spatial distance $d$.

Solution

With one round, one readout or check-ancilla fault can flip an interface outcome. If that outcome contributes to the logical product, the reported parity can change without a later comparison that creates a detector. The measurement observable therefore has timelike distance one.

Repeated rounds create temporal redundancy: changes in a persistent check produce detector events, and a parity-flipping fault chain must extend to a temporal boundary or connect compatible defects. Achieving distance $d$ still requires correct first and last boundary conditions and a circuit whose hooks do not create a shorter mixed path.

5. Estimate long-route volume

A protected ancilla strip has physical length $L=40d$, width $d$, and runs for $d$ cycles. Ignore constants. Compare its qubit-cycle volume with one $d\times d$ patch stored for $d$ cycles.

Solution

The strip area is

$$A_{\rm strip}=Ld=40d^2,$$

so its volume is

$$V_{\rm strip}=40d^3.$$

The stored patch has volume

$$V_{\rm patch}=d^2d=d^3.$$

The route costs forty times the leading volume of one patch over the same duration. Parallel local checks can keep the route time at order $d$, but do not make its area or volume independent of separation.

6. Audit a split geometry

A square distance-$d$ patch is split exactly in half, producing two rectangular daughters whose new transverse width is approximately $d/2$. Can the operation be advertised as two distance-$d$ outputs?

Solution

No. Code distance is the shortest nontrivial logical path in each intermediate and output geometry. If a daughter has a valid logical string of length near $d/2$, its distance is at most that value regardless of the mother’s original label. To obtain two distance-$d$ daughters, the mother needs sufficient extent in the split direction, and the seam, corners, and disabled checks must be included in the path search.

7. Diagnose a decoder handoff

A controller decodes static patch rounds, discards its state, and starts a fresh decoder when the merge begins. What information can be lost?

Solution

A fault chain can begin before the merge and end on an interface detector after the merge. Discarding the old decoder boundary conditions can make each piece look locally harmless or can assign the wrong old stabilizer sign. The lost information includes pending defects, likelihoods, frame signs, leakage flags, and correlations crossing the transition.

A valid implementation uses one time-dependent detector model or passes a well-defined sufficient boundary state between windows. The handoff must preserve both data-correction and logical-parity information.

8. Classify an experimental claim

An experiment splits a distance-three surface-code patch into two distance-three repetition-code outputs. It corrects bit flips but cannot detect output phase flips. Which claim is justified?

Solution

It demonstrates a lattice-split building block and can establish fault-tolerant behavior for the protected bit-flip fault set, together with whatever logical process metrics were actually measured. It does not demonstrate a fully fault-tolerant two-output surface-code surgery, because arbitrary single-qubit errors include phase errors that the repetition-code outputs do not protect. The code, protected channels, postselection, and reference comparison must remain in the claim.

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